looks like good stuff!
"Half-Life 2 will be shown at this year's Electronic Entertainment Expo.
So all these wacky rumors should be cleared up by May 14th.
[Equally]Gamer.nl has publicly leaked two bits of information: the first is that the magazine embargo ends on April 28th, so magazines can publish their Half-Life 2 articles after this date. It's already been shown to certain members of the press.
They also leaked the big news we hinted at before: Half-Life 2 will be released this year.
It should also be noted that this is pretty much the first official mention of Half-Life 2's existence from Valve."
"Half-Life 2 will be shown at this year's Electronic Entertainment Expo.
So all these wacky rumors should be cleared up by May 14th.
[Equally]Gamer.nl has publicly leaked two bits of information: the first is that the magazine embargo ends on April 28th, so magazines can publish their Half-Life 2 articles after this date. It's already been shown to certain members of the press.
They also leaked the big news we hinted at before: Half-Life 2 will be released this year.
It should also be noted that this is pretty much the first official mention of Half-Life 2's existence from Valve."
Toshiba started shipping engineering samples last September and mass production of devices for PlayStation 2 will start soon at Oita TS Semiconductor, a joint venture between SCEI and Toshiba, and this fall at SCEI's Nagasaki fab, in Isahaya City, Nagasaki Prefecture.
Joint development of the 65nm process called CMOS5 started last April and scheduled to be completed in two years. "We've agreed to continue the joint development towards the 45 nm CMOS6 process," said Ken Kutaragi, president and chief executive of SCEI. Kutaragi was promoted to executive deputy president of Sony main office on April 1.
Using the 90-nm CMOS4 process, SCEI integrated PlayStation 2 components into a single chip dubbedEE+GS@90nm. The device includes 53.5 million transistors and 4 Mbyte embedded DRAM in 86 square millimeter die size. It uses a 536-pin EBGA package. "With the practical product [EE+GS@90nm], we can launch mass production using 90-nm process smoothly," said Yoshihide Fujii, executive vice president of Toshiba Semiconductor Co.
With the shift to 90 nm, the embedded DRAM structure will change to a trench capacitor type from the stacked capacitor structure. Sony had collaborated with Fujitsu Ltd. to develop processes up to 0.18 micron and uses a stacked-capacitor DRAM for its embedded devices.
The integrated EE+GS@90nm device will be made at both OTSS and SCEI's Nagasaki fab using the same process.
Cell production
The Cell microprocessor will be the main product at the new 300-mm wafer fab. The processor aims to provide tera-flops performance with low power consumption by using silicon-on-insulator wafers.
Cell has often been described as the next CPU for future versions of the PlayStation 2, but three Japanese companies intend to promote it for wider applications. One application is as a ubiquitous processor that can be used various broadband-network nodes. "It will be the processor that constitutes each server in networks," said Kutaragi.
Sony has its eye on top server vendor Intel Corp., which looms as a key competitor in the network sector. Kutaragi predicted bottlenecks in broadband networks would not be solved using existing PC technology. Hence, he said the Cell processor is designed to break that network bottleneck.
Sony's investment will beneficial not only to SCEI but to whole Sony group, said Kunitake Ando, president and Sony Group COO. Ando said Sony is buying nearly $8.4 billion worth of ICs annually.
"Less than 20 percent of them are internally produced. We purchased even core devices that differentiate products. If such devices are fabricated internally and the percentage of internally procured devices goes up twice, Sony's semiconductor strategy will change greatly," said Ando.

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