This week at CeBIT 2007, AMD has revealed that its "accelerated computing" platform, codenamed Torrenza, is planned as a platform where application-specific processors can interact cost effectively and offer better performance than a general purpose CPU, while remaining compatible with off the shelf platforms. A Torrenza system will have at least two sockets, and both will accept accelerators and processors which have integrated "accelerators" embedded into them. According to AMD, Torrenza systems are not limited to CPU sockets and will accept accelerators in a PCI-Express interface too (Mercury systems announced a PCIe plug-in accelerator late last year), allowing for multiple application specific accelerators to access system memory and processor functions directly.
One accelerated-processor project is slated for 2008 under the codename Fusion. It combines a dedicated GPU or GPU accelerator onto the same package or even the same silicon die as the main CPU. Other Torrenza ready projects are also coming to light. Clearspeed announced its CSX600 math-coprocessor plug-in last year, with the stated intention of creating a socket plug-in version for Torrenza. Los Alamos National Labs is currently building the world's fastest supercomputer, Roadrunner, with Opteron and Cell processors on the Torrenza platform. Intel guidance suggests the company will announce its Torrenza competitor sometime in mid-2008.
View: Diagram
News source: DailyTech
One accelerated-processor project is slated for 2008 under the codename Fusion. It combines a dedicated GPU or GPU accelerator onto the same package or even the same silicon die as the main CPU. Other Torrenza ready projects are also coming to light. Clearspeed announced its CSX600 math-coprocessor plug-in last year, with the stated intention of creating a socket plug-in version for Torrenza. Los Alamos National Labs is currently building the world's fastest supercomputer, Roadrunner, with Opteron and Cell processors on the Torrenza platform. Intel guidance suggests the company will announce its Torrenza competitor sometime in mid-2008.
















And the 3/486 SX's
I'm pretty sure the DX chips had the maths co-processor on board (and I'm including the 386DX here, god I thought I was leet having a DX40 and then a DX2/66)
Don't forget the DX/4 120s.
Don't forget the DX/4 120s.
386 SX chips were cut-down 386 design to work on a 286 board-- 16-bit data bus, 24-bit address bus (hence only 16Mb of RAM!
386 DX was the full 386 -- 32 bit bus, no maths coprocessor.
486 DX chips had maths coprocessors
The first 486SX chips were 486DXs that failed qualification and had the coprocessor disabled.
Later 486SX chips had it removed from the design altogether.
I believe there were some "486 SLC/DLC" versions which had a 16-bit bus, made by TI and Cyrix and the like, but most 486s were 32-bit bus.
The 487SX was a 486DX with an extra pin to signal "disable the 486SX in the socket next to me". People soon saw through the gimmick, and since easy-upgrade boards were becoming available, people would just replace a SX with a DX or DX2/4/5
i could see myself using a dedicated math co now anyways. I need it for actual mathematical use now.
Let alone the performance against Wolfdale (45nm Core 2 Duo)
Think of all the mainboard real-estate you'll have to dedicate to the application-specific processor; Think of all the other PHYs that could be using that space.
Think of all the mainboard real-estate you'll have to dedicate to the application-specific processor; Think of all the other PHYs that could be using that space.
In the working world, some jobs use only 1 application . and nothing more.
What AMD are doing is very clever and is a good move forwards. Items built for the sole purpose of their intended use out perform items made for general purpose. On a 4 socket motherboard this sort of technology is going to scream ahead. And is no different to intel's 80 core CPU in design theory.
Think of all the mainboard real-estate you'll have to dedicate to the application-specific processor; Think of all the other PHYs that could be using that space.
when was the last time u developed and manufactured a cpu?
Think of all the mainboard real-estate you'll have to dedicate to the application-specific processor; Think of all the other PHYs that could be using that space.
when was the last time u developed and manufactured a cpu?
Never. So that means I can't have an opinion on the subject? I don't want machines that can only do one thing, no matter how well they can do that one thing. I want my machines to be flexible enough to be re-tasked if and when the need arises.
Think of all the mainboard real-estate you'll have to dedicate to the application-specific processor; Think of all the other PHYs that could be using that space.
when was the last time u developed and manufactured a cpu?
Never. So that means I can't have an opinion on the subject? I don't want machines that can only do one thing, no matter how well they can do that one thing. I want my machines to be flexible enough to be re-tasked if and when the need arises.
Then Torrenza isn't for you pal. That's what general-purpose multi-core CPUs are for, for flexibility. But there's always a trade-off between flexibility and speed, and AMD is building a platform designed for speed with only single tasks in mind.
Yes, it's a big step forward and will have significant advantages in the area of its application.
BTW all of these can be emulated on the cpu. you wouldn't be happy with the performance but that is a generic cpu for you.
(although hte GPU is becoming more programmable it is basically a stream base paraelle(sp) proc.
as we get to 4 way, 8 way and in 5 years or so 80 way cpus, I can think of much better use of silicon then all general purpose units.
El
Gamer:
Say you have a dual or quad socket MB. You pop in a AMD Cpu and a Physics PPU (don't know if they will call them PPU's just a guess). Your games will work better if the game engine uses a open standard physics system like say Newton. Leaves your main CPU to do its work off loading the physics. AMD has also talked about making a MB with kind of a generic video output on the board. Take this idea pop in a CPU and 1-3 GPUs making SLI or CrossFire on a chip vs a card.
Compiler:
Just to say. You never know what could be made to take advantage of something like this. A task based cpu with hardcoded functions is almost always faster then a general cpu.
This is exactly what I was thinking! When torrenza and cells make it to the consumer pc market... I'll be one happy little boy.
Time to step up to the plate instead of rehashing old material that doesn't work anymore.
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