In Intel's vision of the future, the processor becomes the system architecture instead of a component. "You're going to have a hard time knowing where the processor ends and where the system-on-chip begins. You're going to see incredible integration in the future," said Pat Gelsinger, senior vice president and general manager of Intel's Digital Enterprise Group.
Intel engineers are designing processors with more cores that integrate many of the functions assigned to other chips. In 2008, the company will ship its first Nehalem processors, which will be manufactured using a 45-nanometer process and include an integrated memory controller, eliminating the need for a front-side bus. At roughly the same time, Intel will begin shipments of Tolapai, a system-on-chip that includes an x86 processor, integrated chipset, and an encryption coprocessor for server appliances. A similar chip based on components for consumer electronics, such as integrated graphics, is also slated to enter production next year. Intel's Larrabee chip, now under development, will pack dozens of x86-compatible processor cores onto a single chip. Billed as an alternative to general-purpose graphics processors, Larrabee will be a programmable and highly parallel processor capable of processing graphics and visualization workloads.
The chip giant wants to see system-on-chip processors based on its version of x86, called Intel Architecture (IA), find their way into every computer imaginable, from the smallest handheld devices to the largest supercomputers. While the shift towards system-on-chip processors will yield more powerful chips that are cheaper and consume less power, the chips will be less flexible. They cannot be mixed and matched with other components in the same way that today's processors can. To produce such a wide range of products efficiently, future processors will have to be modular, allowing chipmakers to quickly "dial in" the number of processor cores and other components. Intel is already taking steps in that direction: Nehalem is the first processor architecture Intel has designed with some degree of modularity in mind.
News source: InfoWorld
Intel engineers are designing processors with more cores that integrate many of the functions assigned to other chips. In 2008, the company will ship its first Nehalem processors, which will be manufactured using a 45-nanometer process and include an integrated memory controller, eliminating the need for a front-side bus. At roughly the same time, Intel will begin shipments of Tolapai, a system-on-chip that includes an x86 processor, integrated chipset, and an encryption coprocessor for server appliances. A similar chip based on components for consumer electronics, such as integrated graphics, is also slated to enter production next year. Intel's Larrabee chip, now under development, will pack dozens of x86-compatible processor cores onto a single chip. Billed as an alternative to general-purpose graphics processors, Larrabee will be a programmable and highly parallel processor capable of processing graphics and visualization workloads.
The chip giant wants to see system-on-chip processors based on its version of x86, called Intel Architecture (IA), find their way into every computer imaginable, from the smallest handheld devices to the largest supercomputers. While the shift towards system-on-chip processors will yield more powerful chips that are cheaper and consume less power, the chips will be less flexible. They cannot be mixed and matched with other components in the same way that today's processors can. To produce such a wide range of products efficiently, future processors will have to be modular, allowing chipmakers to quickly "dial in" the number of processor cores and other components. Intel is already taking steps in that direction: Nehalem is the first processor architecture Intel has designed with some degree of modularity in mind.
















Netburst wasn't that memory latency sensitive so it has not made sense to implement an on-die memory controller until now.
Intel will eventually move away from the Front Side Bus to a system more similar to HyperTransport. Not like the FSB is holding back C2D performance anyway (unless you believe AMD marketing).
Netburst wasn't that memory latency sensitive so it has not made sense to implement an on-die memory controller until now.
Intel will eventually move away from the Front Side Bus to a system more similar to HyperTransport. Not like the FSB is holding back C2D performance anyway (unless you believe AMD marketing).
I think you'll find there are bandwidth sensitive applications that do suffer from Intel's fsb, when using their quad cores, or multiple processors. An example I ran into was benchmarking 7-zip, the (single) Kentsfield was being limited by its fsb quite severely. I believe it's generally accepted that Opterons do scale better than Xeons.
Something to keep in mind; in accordance with a legal agreement between Intel and AMD back in the 386/486 era, Intel can license ANY technology AMD develops. Nothing like a huge, multi-billion dollar company using the very corporation that ripped them off to do all their R&D for them, while they can reap the benefits and do it better, if they so desire.
Fanboys, please. Don't rally behind a label, use what is the best bang for your buck at any given upgrade cycle. Your dollars drive innovation far more than any dink "AMD is teh r0xorz!!" forum post.
AMD stockholders starting selling now while your stocks are worth something.
AMD stockholders starting selling now while your stocks are worth something.
FUD
Yeah, this isn't really happening. AMD is doing just fine, no problems at all. Move along folks...
Yeah, this isn't really happening. AMD is doing just fine, no problems at all. Move along folks...
I glad you could put words in my mouth for me. I never said AMD is "doing fine"..... I responded to the "sell your AMD stock" quote, IMHO, is FUD.
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