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AMD to launch nine 45nm Shanghai server CPUs in October

Daniel Fleshbourne   on 02 October 2008 - 16:37 · 7 comments & 4192 views

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AMD has updated server makers that it is planning to bring forward the launch of 45nm server processors (Shanghai) from the original schedule of January 2009 to mid-October. Nine CPUs with core frequencies between 2.3-2.7GHz will be offerer ed initially, according to sources at server makers.

The nine Shanghai processors will include five 2-way and four 8-way models. All will support the company's socket F (1207), and include an on-die DDR2 memory controller and 6MB L2 cache.

View: The full story @ DigiTimes

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#1 steelhand on 02 Oct 2008 - 17:19
I think you mean 4-way and not 8-way. If 8-way were the case then AMD stock would have hit about 50 bucks today.
#2 RAID 0 on 02 Oct 2008 - 17:31
FTFA: Shanghai processors will only support HyperTransport 1.0 initially.

#3 Skynetfuture on 02 Oct 2008 - 21:51
it look all good feq & cache of 6mb is pretty good

but they are creating for them self a unnecessary bottleneck by doing it HTT 1.0 wiared
(1 reply) #4 AUSSIE_FLOYD_FAN on 02 Oct 2008 - 23:32
why havent we seen like 32MB cache or 64MB cache? wouldnt that be just that much more better
#4.1 Peas on 03 Oct 2008 - 00:49
much mo' betta!

Cache takes alot of real estate. Look at a die photo and you'll find that half or more of the chip is cache. If that were increased to 32MB, the die size would be enormous. All those transistors mean lower yield (chance of defects in any one chip is higher), and thus higher price.
#5 nmesisca on 03 Oct 2008 - 09:19
the real hold up is cost. cache is very expensive and including higher sizes would sky-rocket the price of CPUs.
in terms of performance gains, its like having a PC with 64GB RAM as opposed to 8GB RAM. Unless you do some heavy weight processing, you wont see any effect from it.
#6 nmesisca on 03 Oct 2008 - 14:13
I wonder if the HT1.0 limitation is due to the 1207 socket the first batch is going in..

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