Intel to tell all about roaring 96GB/s QuickPath interconnec

You horrible cynics out there looked at Intel's mushy Montvale chip and scoffed. "That's the end of the Itanic." Ah, but there's a fresh monster on the horizon known as Tukwila, and systems based on that puppy should fly if its brand new QuickPath interconnect arrives as expected. Next week Intel will disclose details on QuickPath at the International Solid State Circuits Conference in San Francisco.

What will Intel say? Well, according to the conference program, showgoers will hear about an Itanium processor is implemented in 8M 65nm CMOS and measures 21.5×32.5mm2. The processor has four dual-threaded cores, a system interface and 30MB of cache. Quickpath high-speed links enable peak processor-to-processor bandwidth of 96GB/s and peak memory bandwidth of 34GB/s

View: The full story @ The Reg

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(Lare2 said @ #6)
OMFG :nuts: My mom will love a machine with that to play solitaire and Minesweeper

My mum uses a 165 dual core opteron with a GF7800GT to play mahjong on

Now if we could only get a consumer product based on this technology. A Vista port would be nice, better yet, how about a Windows 7 release (which of course will never happen). This is sad really, because it leaves us as consumers left to pick either the AMD64 or Core 2 Duo lineups which are inferior junk (over priced, outdated). Of course by the time a consumer version of the CPU was released it would be so limited that it probably would be no better than the existing x86 Core 2 Duo (yes, even the worthless quad core). Not to mention all the applications that would have to be rewritten, when we can't even get a descent x64 port of some of the most popular applications (for sys with 8gigs of memory or more).

Why, yes, yes it is! I'm pretty excited, myself. If you read my previous posts on AMD/Intel FPN topics, you'll see this is what I've been talking about all along; this is exactly what Intel needs, because PU-to-PU communication has always been their weakness. Once this hits the public, that weakness is gone, and this new architecture even looks like it could scale well!

One the other hand: I've been hearing rumblings that AMD has a CPU line they're finalizing now that has 1.5x to 2x better per-thread performance than the latest Core 2 Duos, and will be first fabbed @ 65nm but can scale down to 45nm. (C2 Quads have weaker per-thread compared to C2 Duo)

If this is true, things are REALLY getting interesting!

Exciting times!

(David3k said @ #2.1)
Why, yes, yes it is! I'm pretty excited, myself. If you read my previous posts on AMD/Intel FPN topics, you'll see this is what I've been talking about all along; this is exactly what Intel needs, because PU-to-PU communication has always been their weakness. Once this hits the public, that weakness is gone, and this new architecture even looks like it could scale well!

One the other hand: I've been hearing rumblings that AMD has a CPU line they're finalizing now that has 1.5x to 2x better per-thread performance than the latest Core 2 Duos, and will be first fabbed @ 65nm but can scale down to 45nm. (C2 Quads have weaker per-thread compared to C2 Duo)

If this is true, things are REALLY getting interesting!

Exciting times!

True; with all that bandwidth the CPU's will always have a massive flow of data in the tubes ready to get crunched :)

The downside, what will be the effect on power/battery life?

(David3k said @ #2.1)
One the other hand: I've been hearing rumblings that AMD has a CPU line they're finalizing now that has 1.5x to 2x better per-thread performance than the latest Core 2 Duos, and will be first fabbed @ 65nm but can scale down to 45nm. (C2 Quads have weaker per-thread compared to C2 Duo)

If this is true, things are REALLY getting interesting!


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