THERE'S NOT MUCH information around yet about Nvidia's future part codenamed NV40, but even so we have enough to eliminate some totally clueless stuff that's swilling around the Web. We can clearly state that this chip is going to be built using 0.13µ (micron) marchitecture and IBM already said that it will play with this chip to make it work for Nvidia, so no surprises there. Nvidia is unlikely to dabble with .11µ architecture yet, we'd say.
This marchitecture and its cost is limited to a maximum 200 millions of transistors in order to earn any money from this wafer. We asked around and learned that the new chip likely won't be eight pipelines x two TMUs, as this isn't enough to keep Nzilla in the game. Sixteen pipelines capable of handling FPU information and one TMU is impossible at this time we are told, whioch leads us to speculate the next Nvidia part will likely use 12 pipelines. Twelve pipelines is possible despite it interfering with the nice progression of 2,4, 8 and 16. The NV40 will be a native PCI Express chip with some kind of bridge to make it work in current AGP boards that will co-exist for quite some time.
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News source: The Inq
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