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[assembly] MIPS: 4 byte words?


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Hey all, trying to get my head around some MIPS basics.

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Since 8-bit bytes are are useful in many programs, most architectures address individual bytes. Therefore the address of a word matches the address of one of the 4 bytes within the word. Hence, addresses of sequential words differ by 4.
Eh? A word is 32 bits right. 4 x 8 bits = 32 bits (ie. 4 x 4 bytes = 1 word). How does the address of a word match the address of ONE of the 4 bytes WITHIN the word then?! That doesn't make sense to me!

Cheers for any help. This is driving me nutty cause it's meant to be basic but doesn't seem to sink in to my head :ninja:

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Oh... I think the size of a "word" is architecture dependent?? :x Hmm, let me include a diagram:

actualMIPSadddresses.jpg

Ok, so there you see the addresses next to the data, as it would appear in MIPS architecture.

Q1) How come it's in blocks of 4? How do you interpret it?

Q2) I thought each "data" was 32 bits (ie. 1 word) in MIPS architecture. So the memory address 0 contains some data unit that is 32 bits, the memory address 4 contains some data unit that is 32 bits... and so on? That can't be right, since...

  Quote
...most architectures address individual bytes. Therefore the address of a word matches the address of one of the 4 bytes within the word.
Erm, does that therefore mean that from addresses 0 to 12 inclusive is ONE word (ie. 32 bits) then?!? I'm confused between the diagram above and the quote (both given from the text).

Ta.

Edited by fault
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Hehe, I just finished a course which had MIPS in April, so this stuff is fresh in my head (plus, I knew it all before anyways).

As you should know, 8 bits make up a byte. On a MIPS system, a word is defined as 32 bits (4 bytes). On an 80286, it would be 16 bits. The definition of a 'word' is architecture dependent. People usually think of a word as 16 bits because they're stuck in the stone age. Anywho, all MIPS instructions are 32 bits in length. It is because all MIPS instructions are 32 bits that the memory is viewed as being arranged into 4 byte (32 bits) blocks. The memory address stated in your disgram is in terms of BYTES and not bits. So at address 0, you put your first 4 bytes. At address 4, you put your second 4 bytes and so on.

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