PSC to start 512Mbit DDR2 pilot runs in 2Q 2004

Taiwan based Powerchip Semiconductor Corporation (PSC) is set to start pilot runs of 512Mbit DDR2 production in the second quarter of 2004, with technology support from Japan-based Elpida Memory, according to sources. The DDR2 production will adopt Elpida's 0.10-micron process, with volume production and shipments of 667MHz and 800MHz products scheduled to start in the third quarter of 2004, sources said. Sources said the company set the goal in a high-level meeting with Elpida on September 2, which was led by Elpida president Yukio Sakamoto and PSC chairman Frank Huang in Taiwan.

The two sides also agreed to start technical personnel exchanges in the first quarter of next year, before beginning test runs of 0.10-micron processing using Elpida's technology at PSC's 12-inch fab in the second quarter. According to sources, PSC's 12-inch wafer monthly capacity will reach 30,000 units in mid-2004.

Elpida is a strategic partner of Intel, and since Intel is pushing to launch motherboard chipsets supporting DDR2 in the second quarter of 2004, Elpida has made great efforts to work with Taiwanese partners to ensure sufficient supply of the new products, sources said.

News source: DigiTimes

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