AMD to outline plans for the transistors of the future

AMD SAYS IT WILL SHOW OFF a bunch of technical achievements "critical", it reckons, to the creation of next-generation transistors and memory cells at this year's International Electron Devices Meeting (IEDM), that kicked off yesterday in San Francisco. The chipmaker is scheduled to present three technical papers at the meeting outlining its research into future transistor structures.

The company says it will provide details on research conducted with University of California, Berkley on Fin Field Effect Transistors (FinFET) which it reckons may replace today's planar transistors as the industry standard for high-performance logic chips.

FinFet transistors use a single vertical silicon "fin" to create two gates instead of one, effectively doubling the electrical current that can be sent through the transistor and improving the transistor's switching characteristics.

In a statement, AMD vice president of process technology development, Craig Sander, said: "Multi-gate transistor structures such as our version of FinFET hold the key to achieving next generation performance, while continuing to use many of our existing manufacturing methods."

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