PCI-SIG announces final PCI Express 5.0 specification

The PCI-SIG consortium, which is responsible for the development of the PCI, PCI-X and PCI Express (PCIe) standards, announced in a press release that the PCI Express 5.0 specification has been finalized. Compared to PCI Express 4.0, the latest standard doubles the raw bit rate, which now reaches 32 GT/s or GigaTransfers/second.

The new specification will offer increased performance in bandwidth-heavy computing markets such as artificial intelligence, machine learning, gaming, visual computing, storage, and networking. Although PCIe 5.0 implements electrical changes, it will remain backwards compatible with previous versions.

PCIe 5.0 Specification Highlights:

  • Delivers 32 GT/s raw bit rate and up to 128 GB/s via x16 configuration
  • Leverages and adds to the PCIe 4.0 specification and its support for higher speeds via extended tags and credits
  • Implements electrical changes to improve signal integrity and mechanical performance of connectors
  • Includes new backwards compatible CEM connector targeted for add-in cards
  • Maintains backwards compatibility with PCIe 4.0, 3.x, 2.x and 1.x

PCI-SIG Chairman and President Al Yanes said in a statement that the PCIe 5.0 specification was completed in 18 months and added that “the PCIe architecture will continue to stand as the defacto standard for high performance I/O for the foreseeable future.”

PCIe 4.0 was officially announced in 2017 and the first products to support it are AMD’s upcoming 7nm Ryzen 3000 series CPUs and Radeon 5000 series GPUs, which are slated to launch on July 7. Likewise, PCIe 5.0 should have a similar turnaround time with the first products launching around the 2021 timeframe.

Image via PCI-SIG (Twitter)

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