VIA Technologies is scheduled to launch its new processor core, dubbed Isaiah, in the first quarter of 2008, with the new architecture entering EVT (engineering validation test) stage in the fourth quarter of 2007, according to market sources. The Isaiah core (engineering codename CN) will replace VIA's Esther processor architecture, which was introduced in 2004. Isaiah features a 64-bit architecture and will be manufactured on a 65nm process, as compared to 90nm for Esther. Other features include a V4 Bus speed of 1333MHz, up from 800MHz previously, and support for ECC (error checking and correction) memory and virtualization technology. The L2 Cache will also increase to 1MB from 128KB previously.
Although Isaiah's core frequency will not see any obvious increases and power consumption will be higher compared to Esther, its performance so far has been measured to be twice as fast as that delivered by the Esther architecture, and the floating point unit performance is four times greater, according to makers that are testing the new architecture. With the lower cost and better performance, the new processor has a chance to boost VIA's revenues, added the sources.
News source: DigiTimes
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