IBM combination technique speeds PC chips

Researchers at IBM have come up with a new approach to building transistors that could lead to faster, more energy-efficient chips in a few years. The company has managed to combine both strained silicon and a silicon insulator into the same wafer. Strained silicon improves electron mobility, or the speed at which electrons can travel through silicon. Silicon insulators reduce leakage, or the amount of energy inadvertently dissipated, a major problem facing chip designers today. The combination design, which will begin to appear in chips later this year, can improve transistor performance by as much as 20 percent to 30 percent.

"Both approaches have their merit, and they are complementary," said Nathan Brookwood, an analyst at Insight 64.

Since the beginning of the decade, chip designers have had to rethink many of the basic assumptions of their craft because of a growing conflict between power consumption and performance. Chips now on the market can contain as many as 250 million transistors, and the number is increasing because of Moore's Law. Not only is it extremely difficult to get power rapidly to this huge mass of transistors, the electricity required to run these processors generates problematic amounts of heat.

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News source: ZDNet UK

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