AMD Ryzen processors are set to receive another performance boost on Linux. A Linux Red Hat developer, Tejun Heo, observed that the Last Level Cache (LLC), which is the Level 3 (L3) cache in the case of Zen 2 processors can be further optimized.
The operating system assigns a particular task to a processor thread which is identified as "idle" by the OS. At the moment, the Linux kernel only identifies idle threads within the local LLC. However, with the latest proposed patch, this is set to change as "select_idle_sibling()" will now be able to consider external LLC as well. This means the OS will be able to schedule and queue tasks quicker in case there are idle threads on another CCX (CPU Complex) or CCD (Core Compute Die).
Linux kernel engineer Peter Zijlstra sent the following patch titled "sched/fair: Multi-LLC select_idle_sibling()" recently. It reads:
Tejun reported that when he targets workqueues towards a specific LLC on his Zen2 machine with 3 cores / LLC and 4 LLCs in total, he gets significant idle time.
This is, of course, because of how select_idle_sibling() will not consider anything outside of the local LLC, and since all these tasks are short running the periodic idle load balancer is ineffective.
And while it is good to keep work cache local, it is better to not have significant idle time. Therefore, have select_idle_sibling() try other LLCs inside the same node when the local one comes up empty.
The images below show AMD Zen 2's CCX, CCD, and the cache hierarchy in the case of a single CCD (left) and dual CCDs (right):
The change talks about Zen 2 or Ryzen 3000 series CPUs in particular, but its predecessors like Zen+ and the original Zen architecture also used a similar approach where each CCX has its own L3 cache or LLC, and they inter-communicate via the Infinity Fabric.
The images below are the original Zen core architecture and its L1, L2, and L3 caches:
AMD continues to use this with Zen 3 (Ryzen 5000) and Zen 4 (Ryzen 7000) series CPUs as well. Hence, the upcoming optimizations will be applicable throughout the stack. This is actually something older Zen CPU users will appreciate as Microsoft has deemed the Zen-based Ryzen 1000 series chips unsupported for Windows 11.
The company moved to a 32MB Shared LLC (SLLC) L3 design on Zen 3 from a 16MB one on Zen 2:
While we are on the topic of LLC, AMD's main x86 rival Intel is also working on a new Level 4 (L4) cache for its 14th Gen Meteor Lake CPUs that could enable faster boot times.